Multiple input port circuit having temperature zero voltage offset bias means
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 27, 1986
Grant Date -
N/A
app pub date -
Feb 28, 1983
filing date -
Feb 28, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A plurality of input stages having their outputs connected to provide differential currents to a load. When a bias current flows through a selected one of the input stages, the differential currents are provided in response to a differential signal provided to the selected stage. The input stages are each comprised of a pair of emitter-coupled transistors. Resistors are connected in series with the emitters of the transistors and the bias current is directly proportional to absolute temperature. The resistors may be adjusted to cause the offset voltages of the input stages to substantially equal zero at all temperatures.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully