Multi-channel implantable neural stimulator
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United States of America Patent
Stats
-
Jun 3, 1986
Grant Date -
N/A
app pub date -
Apr 2, 1985
filing date -
Apr 2, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A combination of a transmitter and implantable receiver are disclosed wherein data is conveyed from transmitter to receiver utilizing a data format in which each channel to be stimulated is adapted to convey information in monopolar, bipolar or analog form. The data format includes two types of code words: transition words in which one bit is assigned to each channel and can be used to create monopolar pulsatile or bipolar pulsatile waveforms; and amplitude words which can create analog waveforms one channel at a time. An essential element of the output system is a current source digital to analog converter which responds to the code words to form the appropriate output on each channel. Each output is composed of a set of eight current sources, four with one polarity of current and the other four with the opposite polarity of current. In each group of four, the current sources are binarily related, I, 2I, 4I and 8I. In this arrangement each channel can supply 16 amplitudes times two polarities of current; meaning 32 current levels. This channel is simply a 5-bit digit to analog converter. The output circuitry contains charge balance switches. These switches are designed to recover residual charge when the current sources are off. They are also designed to current limit during charge recovery if the excess charge is too great so that they do not cause neural damage. Each channel charge balances (will not pass DC current or charge) and charge limits to prevent electrode damage and bone growth. The charge balancing is performed by the charge balancing switches and by the blocking capacitor. The charge limiting is performed by the blocking capacitor only. The charge level on each channel is defined using a switch network ladder which combines a plurality of parallel connected switches; closure of each switch doubles the current level handed off from the previous switch.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY THE A CA CORP | STANFORD CA 94305 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Galbraith, Douglas C | Stanford, CA | 19 | 1572 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
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| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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