
US Patent No: 4,600,845
Number of patents in Portfolio can not be more than 2000
Fault-tolerant clock system
Stats
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Jul 15, 1986
Issued date -
Dec 30, 1983
filing date -
06/567,249
serial no -
Expired
status
Importance
Abstract
A clock generator source, a plurality of which can be used as redundant clock sources in a fault tolerant clock system. The input and output clock signals of said source being formed of a plurality of pulses having a frequency substantially higher than the frequency of the input and output signals, one pulse being omitted in each cycle thereof to form a "dead interval" therein when the input and output signals are in phase. When the output signal is not in phase with the input signal at the start of a cycle the length of the cycle of the output signal is either lengthened or shortened by inserting a second dead interval or omitting the dead interval, respectively, to bring the input and output signals in phase by the end of the cycle.
First Claim
Related Publications
International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 4,373,204 Phase locked loop timing recovery circuit | 7 | 1981 | |
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| 4,309,662 Circuit for rapidly resynchronizing a clock | 16 | 1980 | |