Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 5, 1986
Grant Date -
N/A
app pub date -
Jan 28, 1985
filing date -
Jan 28, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate having a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of the semiconductor device to a corresponding set of solder wettable pads on a substrate, the improvement being a band of dielectric organic material disposed between and bonded to the device and substrate embedding at least an outer row of solder connections leaving the center inner solder connections and the adjacent top and bottom surfaces free of dielectric material.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully