Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein
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United States of America Patent
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-
Oct 14, 1986
Grant Date -
N/A
app pub date -
Sep 27, 1984
filing date -
Sep 27, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An improved package for a semiconductor device comprises an integrated circuit die and a mounting package having an array of parallel leads which directly connect perpendicular to the die. The process for making the package comprises forming an array of parallel, spaced apart, conductor pins; bonding the array of parallel conductor pins directly to an integrated circuit die while maintaining the die in a plane perpendicular to the parallel pins; and surrounding the die with a package material capable of protecting the die.
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