CMOS .DELTA.V.sub.BE bias current generator
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United States of America Patent
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-
Oct 21, 1986
Grant Date -
N/A
app pub date -
Aug 22, 1985
filing date -
Aug 22, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a CMOS structure a pair of BJTs are provided with lateral collectors and operated at different current densities. The lateral collectors are coupled to a current mirror load which provides a single ended output node. The pair bases are coupled together and to the current mirror load input so that the lateral BJT collectors operate at low potential. A current source supplies tail current and a resistor is coupled in series with the low current density BJT. The single ended output node is coupled to a current mirror that determines the BJT tail current. The circuit therefore has a negative feedback loop around the BJTs that will stabilize operation so that .DELTA.V.sub.BE appears across the resistor. The resistor can be chosen so that the overall circuit temperature coefficient can be established at a desired value.
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