Importance

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Abstract

In an ATC apparatus, an ROM stores a plurality of parameters used for identification of an ATC signal. These parameters are sequentially read out from the ROM and applied to a ring-arithmetic type frequency pattern generating circuit to be converted into a plurality of pulse trains having respective reference frequencies. These pulse trains are then sequentially applied to a ring-arithmetic type frequency comparison circuit and are compared with the frequency-modulated ATC signal in a time division mode so as to identify the speed limit indicated by the ATC signal. The frequency pattern generating circuit generates also a pulse train corresponding to the speed limit. The frequency comparison circuit executes also comparison between the frequency of the pulse train indicative of the speed limit and that of a pulse train indicative of the detected train speed, and an ATC brake instruction signal is generated when the result of comparison proves that the detected train speed exceeds the speed limit. The frequency pattern generating circuit and the frequency comparison circuit are included in a single LSI.

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First Claim