Digital data transmission system

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United States of America Patent

PATENT NO 4618955
SERIAL NO

06581753

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In digitally encoded data transmission systems such as paging systems using a code word format, such as POCSAG, each code word includes a number of bits collectively termed the cyclic redundancy check bits. In a paging receiver the cyclic redundancy check bits are used to determine if there are errors in the received message code words. If an error is detected then one bit random error correction is generally applied because it has a more acceptable falsing rate compared to say two bit random error correction or four bit burst error correction. However a less acceptable falsing rate correction technique, such as four bit burst error correction, can be given if additional protection against falsing is provided. The additional protection comprises error detection check bits which are included in the entire message transmitted by the base station. At the receiver any errors in the message code words are subjected to four bit burst error correction and thereafter the entire 'corrected' message is subjected to a further check using the error detection check bits. Whether or not error detection check bits have been included in the message is indicated by preconditioning the message, for example by using predetermined ones of the plurality of addresses allocated to each pager for different purposes. If error detection check bits have not been included a more acceptable falsing rate correction technique is applied.

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Patent Owner(s)

Patent OwnerAddress
U S PHILIPS CORPORATION 100 EAST 42ND ST NEW YORK NY 10017 A CORP OFDE

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mabey, Peter J Crawley, GB2 8 426
Sharpe, Anthony K Teversham, GB2 11 318

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