SIMD machine using cube connected cycles network architecture for vector processing

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United States of America Patent

PATENT NO 4621339
SERIAL NO

06503654

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Abstract

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A single instruction, multiple data stream parallel computer using bit-serial arithmetic whereby the machine's basic operation is performing Boolean operations on huge vectors of 0's and 1's. The machine utilizes an architectural approach whereby the memory of a conventional machine having 2.sup.k words each t bits long, is reorganized into p registers each 2.sup.k bits in length and adding processor logic to each bit position of the registers and a communication network being added which allows for the 2.sup.k pieces of processing logic to interact. This machine is capable of executing a wide variety of algorithms at a speed of 2.sup.k /p to 2.sup.k /p.sup.2 faster than conventional machines. The machine provides for an ability to handle a variety of algorithms by interconnecting the individual processor elements in a general interconnection network capable of performing a permutation of n bits held one in every processor element in a time of (O(log(n)).

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Patent Owner(s)

Patent OwnerAddress
DUKE UNIVERSITY2812 ERWIN ROAD SUITE 306 BOX 90083 DURHAM NC 27710

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Poirier, Charles J Red Bank, NJ 1 169
Wagner, Robert A Durham, NC 8 302

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