Formation of a multi-layer glass-metallized structure formed on and interconnected to multi-layered-metallized ceramic substrate

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4622058
SERIAL NO

06844260

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In the fabrication of an interconnection package for a plurality of semiconductors or integrated circuit chips wherein a multi-layered glass or glass-ceramic superstructure with a multi-layered distribution of planar conductors is formed by a process forming vertical conductive interconnection or studs between planar conductor layers, by pre-forming a via configuration in each glass or glass-ceramic layer at the interconnection points followed by depositing the conductive studs therein. The via configuration is formed by defining a desired pattern of vias, and ablating the vias through the top of and through the glass or glass-ceramic layer, using an ultraviolet laser. The vias may be stepped-shoulder or counter-bored by using a two mask operation.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
INTERNATIONAL BUSINESS MACHINES CORPORATIONARMONK, NY44790

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Leary-Renick, Pamela A Fishkill, NY 1 62
Srinivasan, Rangaswamy Yorktown Heights, NY 10 776

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
* 4439270 Process for the controlled etching of tapered vias in borosilicate glass dielectrics 40 1983
* 4478677 Laser induced dry etching of vias in glass with non-contact masking 56 1983
 
ARADIGM CORPORATION (1)
* 4508749 Patterning of polyimide films with ultraviolet light 107 1983
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (11)
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* 5266446 Method of making a multilayer thin film structure 100 1992
* 5338900 Structures for electrically conductive decals filled with inorganic insulator material 27 1992
* 5940729 Method of planarizing a curved substrate and resulting structure 18 1996
* 5858254 Multilayered circuitized substrate and method of fabrication 2 1997
* 5817543 Method of constructing an integrated circuit memory 7 1997
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6294835 Self-aligned composite insulator with sub-half-micron multilevel high density electrical interconnections and process thereof 14 1999
* 6150255 Method of planarizing a curved substrate and resulting structure 9 1999
 
QUALCOMM INCORPORATED (9)
9030029 Chip package with die and substrate 0 2002
* 8535976 Method for fabricating chip package with die and substrate 1 2003
* 2003/0205,804 Integrated chip package structure using ceramic substrate and method of manufacturing the same 10 2003
9136246 Integrated chip package structure using silicon substrate and method of manufacturing the same 0 2004
9391021 Chip package and method for fabricating the same 0 2009
* 2010/0013,082 CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME 6 2009
8471361 Integrated chip package structure using organic substrate and method of manufacturing the same 2 2011
8492870 Semiconductor package with interconnect layers 1 2011
8835221 Integrated chip package structure using ceramic substrate and method of manufacturing the same 1 2013
 
Other [Check patent profile for assignment information] (2)
* 2005/0101,037 Test system with interconnect having conductive members and contacts on opposing sides 11 2004
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BULL S.A. (1)
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Max Levy Autograph, Inc. (6)
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TYCO ELECTRONICS UK LTD. (2)
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HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (1)
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OMRON CORPORATION (1)
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IBIDEN CO., LTD. (2)
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NGK SPARK PLUG CO., LTD. (1)
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MICRON TECHNOLOGY, INC. (4)
* 8288859 Semiconductor device packages including a semiconductor device and a redistribution element 1 2011
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GLOBALFOUNDRIES INC. (2)
9232645 High speed differential wiring in glass ceramic MCMS 0 2013
9232646 High speed differential wiring in glass ceramic MCMS 0 2013
 
FUJITSU LIMITED (2)
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HITACHI, LTD. (1)
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Mini-Systems, Inc. (1)
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ROUND ROCK RESEARCH, LLC (2)
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NEC CORPORATION (1)
* 5322593 Method for manufacturing polyimide multilayer wiring substrate 21 1992
 
INTEL CORPORATION (4)
* 7749900 Method and core materials for semiconductor packaging 7 2008
9420707 Substrate for integrated circuit devices including multi-layer glass core and methods of making the same 0 2009
8456016 Method and core materials for semiconductor packaging 0 2010
* 9445496 Glass clad microelectronic substrate 0 2012
 
ELECTRO SCIENTIFIC INDUSTRIES, INC. (2)
* 5841099 Method employing UV laser pulses of varied energy density to form depthwise self-limiting blind vias in multilayered targets 131 1996
* 6025256 Laser based method and system for integrated circuit repair or reconfiguration 43 1997
 
MATSUSHITA ELECTRIC CORPORATION OF AMERICA (1)
* 5683601 Laser ablation forward metal deposition with electrostatic assisted bonding 15 1996
 
INTEL DEUTSCHLAND GMBH (2)
* 9263376 Chip interposer, semiconductor device, and method for manufacturing a semiconductor device 0 2013
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MICROELECTRONICS AND COMPUTER TECHNOLOGY CORPORATION (1)
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MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (8)
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6211080 Repair of dielectric-coated electrode or circuit defects 7 1996
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6180912 Fan-out beams for repairing an open defect 2 1998
* 6060127 Mechanically restricted laser deposition 7 1998
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6838153 Layered product, capacitor and a method for producing the layered product 1 2002
 
GORE ENTERPRISE HOLDINGS, INC. (1)
* 5868950 Method to correct astigmatism of fourth yag to enable formation of sub 25 micron micro-vias using masking techniques 13 1996
 
ROGERS GERMANY GMBH (2)
* 8584924 Method for the production of a metal-ceramic substrate, preferably a copper ceramic substrate 0 2003
8342384 Method for the production of a metal-ceramic substrate, preferably a copper ceramic substrate 0 2012
* Cited By Examiner