Coherent interface with wraparound receive and transmit memories
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United States of America Patent
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-
Nov 18, 1986
Grant Date -
N/A
app pub date -
Dec 13, 1984
filing date -
Dec 13, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An interface for use between an asynchronous bus and a signal processor is disclosed. The interface utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.
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