Importance

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Abstract

Apparatus for producing programmable timing signals, having a microprocessor element with means for carrying out DMA operations when said microprocessor element is in a DMA mode, memory interconnected with said microprocessor element and containing a stored program and a plurality of data words stored at predetermined addresses for selection by said microprocessor when in said DMA mode, comprising controller means for transforming received data words into timing signals, connecting means for interconnecting said microprocessor element, said controller and said memory, said controller having means for setting said microprocessor in said DMA mode upon receipt of a predetermined signal generated by said program, means for receiving data words directly from said memory under control of said microprocessor when said microprocessor is in said DMA mode, and means for generating a two state timing signal corresponding to the data content of one or more such received data words. Hereby the operability of the pacer is improved whereas simultaneously low power requirements are maintained.

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First Claim