Digital circuit using MESFETS
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United States of America Patent
Stats
-
Dec 23, 1986
Grant Date -
N/A
app pub date -
Jun 27, 1984
filing date -
Jun 27, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Two MESFETS with the drain of one connected to the source of the other are driven in complementary fashion by a single inverter using a third MESFET and a voltage level shifter, in response to digital signals input to the inverter. Means for selectively disconnecting the power supply from the inverter to place the circuit in a low power, standby mode is provided. Depletion and enhancement mode MESFET configurations of the circuit are disclosed.
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