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Abstract

The frequency divider includes a first or prescaling counter which selects between first and second frequency division factors, in response to a first control signal, and then divides an input signal frequency responsive to the first control signal. A second and programmable counter frequency divides the output of the first or prescaling counter by a third frequency-division factor. A third and programmable counter frequency divides the output of the first counter by a fourth frequency-division factor which is smaller than the third frequency-division factor. A switching control circuit then converts the output of the third counter and supplies the converted signal to the first counter, as the first control signal. The digital frequency divider is suitable for use a part of a phase-locked loop frequency synthesizer.

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First Claim