Power FET driving circuit
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United States of America Patent
Stats
-
Jan 6, 1987
Grant Date -
N/A
app pub date -
Jan 31, 1985
filing date -
Feb 20, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
This invention pertains to a power FET control circuit which operates at higher switching frequencies for reducing the output voltage ripple. The control circuit provides two pulse control signals each shifted 180.degree. out of phase, each of such signals having a fixed frequency and a duty-cycle ratio which varies up to a maximum of 50%.
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Cited Art Landscape
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