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Abstract

A logic state analyzer allows a user to include symbols defined in source program listings, as well as other specially defined symbols, in the trace specification. Such symbols represent unique individual values or ranges of values. The resulting trace list includes these symbols, and where possible, all address, operands, etc., are expressed in such terms. When those symbols are relocatable entities produced by compilers and assemblers the result is that the user is freed from having to duplicate the relocation process to specify absolute values in the trace specification, and later reverse it to interpret absolute values in the listing in terms of symbols originally defined in the source programming. A further result is that the states within an arbitrary finite state machine can be assigned descriptive labels, with the trace specification and trace listing subsequently expressed in those terms. Trace values can also be represented relative to a symbol. The same principles are extendable to handle memory segment offsets invoked by memory management units that automatically convert a relocated virtual address emitted by a processor into a dynamically adjusted run time physical address actually sent to the memory. According to a preferred embodiment of the invention the analyzer makes use of various symbol tables produced by any associated assemblers and compilers, as well as of any additional special symbol definitions desired by the user. The analyzer provides absolute values for these symbols by application of the load map produced during the relocation of the various programs into the target system monitored by the logic analyzer.

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First Claim