Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers
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United States of America Patent
Stats
-
Jan 27, 1987
Grant Date -
N/A
app pub date -
Dec 30, 1983
filing date -
Dec 30, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a computer system, an improved memory circuit is provided for accomodating video display circuits with CRT screens having different resolutions. The memory circuit includes a bit-mapped RAM unit or chip having sufficient cells to accomodate any CRT screen intended to be used, and it further includes a serial shift register having a plurality of taps at locations corresponding to different preselected columns of cells in the chip. In the system, provision is included for selecting taps to unload only the portion of the shift register containing the bits of interest, whereby unused portions of the chip may be effectively excluded and the time for transferring data of interest to the CRT screen is reduced.
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