Importance

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Abstract

The present invention is related to clearing a communication path and in the alternative blocking said communication path between a data terminal and a main data processor, when it appears, from said terminal end, that the data path into the main computer is blocked by some system irregularity in a first case, or should be blocked because of a data overflow condition, in a second case. The present system employs a pair of buffers, the first of which is connected in said communication path, while the second buffer is connected in a data path along which data signals are transmitted from the main data processor. Said communication path includes first logic circuitry connected between said first buffer device and a UART which is connected to the main data processor. Said first logic circuitry can block or unblock the transmission of data to the main data processor. Second logic circuitry is connected between the second buffer and said UART. Said second logic circuitry includes monitoring circuitry which monitors signals coming from the main data processor so that if an 'off' signal is transmitted, then a proper signal will be generated and sent to said first logic circuitry to block data transmission from said terminal.

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First Claim