Resist development method

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United States of America Patent

PATENT NO 4647172
SERIAL NO

06735397

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Abstract

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In the resist development method disclosed herein, the spin development of a resist coating on the surface of a semiconductor wafer is monitored by measuring light scattered back from the wafer surface from an incandescent source. During development, the sensed light level oscillates due to optical fringing caused by the thinning of the resist layer in the exposed areas and the fringe generated oscillation essentially stops when the development breaks through in the exposed areas. By comparing sample data obtained from the sensed light level with template data representing a known or characteristic behavior, a control point corresonding to the last fringe may be determined. Development is then terminated a calculated time after the control point.

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Patent Owner(s)

Patent OwnerAddress
GCA CORPORATION 209 BURLINGTON ROAD BEDFORD MA A CORP OF DENot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Batchelder, William T Menlo Park, CA 4 226
Piatt, John A Soquel, CA 8 132
Sautter, Kenneth M Sunnyvale, CA 18 753

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