Process for dielectrically isolated semiconductor structure

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United States of America Patent

PATENT NO 4649630
SERIAL NO

06718255

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Abstract

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A process is disclosed for controllably providing dielectrically isolated semiconductor regions having a uniform and well defined thickness. Grooves are formed in a first surface of a semiconductor substrate and then a dielectric layer is formed covering that surface and the grooves extending into the surface. A layer of backing material such as polycrystalline silicon is formed overlying the dielectric layer. A semiconductor substrate is then thinned to form a new surface with portions of the dielectric layer and backing material exposed at that surface. A semiconductor layer is epitaxially grown overlying the new surface with the semiconductor layer having a monocrystalline structure where it is grown on exposed regions of the original substrate and having a polycrystalline structure otherwise. An oxidation masking layer is formed overlying those portions of the semiconductor layer which have a monocrystalline structure. Those portions of the semiconductor layer which are not covered by the oxidation masking layer are then oxidized to form an oxide extending through the semiconductor layer to the underlying dielectric layer. This oxide plus the original dielectric layer thus surround and isolate individual regions in which a portion of the original substrate has an epitaxial layer of semiconductor material grown thereon.

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Patent Owner(s)

Patent OwnerAddress
FREESCALE SEMICONDUCTOR INC6501 WILLIAM CANNON DRIVE WEST AUSTIN TX 78735

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Boland, Bernard W Scottsdale, AZ 16 157
Sanders, Paul W Scottsdale, AZ 28 692

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