Method of fabricating a thin film transistor array

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United States of America Patent

PATENT NO 4654117
SERIAL NO

06839673

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Abstract

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An array of thin film transistors is fabricated by forming a plurality of spaced closely adjacent metallic source and drain electrodes on an array area of a transparent substrate, forming semiconductor layers on the substrate between each adjacent pair of source and drain electrodes in overlapping relation to the edges of each such pair, covering the semiconductor layers with a gate insulation film that extends over substantially all of said array area, forming a transparent gate electrode layer over the gate insulation film, covering the transparent gate electrode layer with a photosensitive resin layer which is then exposed to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes acting as masks, developing the photosensitive resin layer to remove portions thereof other than the exposed portions, and etching the transparent gate electrode with the remaining portions of the resin layer serving as masks thereby to form the gate electrodes of the thin film transistors in the array.

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Patent Owner(s)

Patent OwnerAddress
HOSIDEN AND PHILIPS DISPLAY CORPORATION3-1 TAKATSUKADAI 4-CHOME NISHI-KU KOBE-SHI HYOGO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aoki, Shigeo Habikino, JP 33 1328
Tamamura, Junichi Yao, JP 9 380
Ukai, Yasuhiro Yao, JP 39 1506

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