System for automatic testing of circuits and systems
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United States of America Patent
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Apr 7, 1987
Grant Date -
N/A
app pub date -
Nov 25, 1983
filing date -
Nov 25, 1983
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A Universal Pin Electronics ('UPE') System is disclosed which incorporates a plurality of testing channels, each of which is coupled to a single input pin of a unit under test and is capable of selectively generating a plurality of different types of stimuli and applying the same to the single pin of the unit under test. The test channels are also coupled to a single output pin of the unit under test and are capable of receiving an induced output from the unit being tested. Test channels may be coupled to a common single pin of the unit under test which pin is capable of functioning as a bidirectional pin. In a preferred embodiment, each test channel has the capability of selectively generating functional digital, parametric digital and analog stimuli, applying the same to a pin of the unit under test, and receiving the output of the same or a different pin and comparing it with the expected output or storing it. The test channel includes a local memory which receives and stores digital information corresponding to functional digital, parametric digital, and analog stimuli to be generated by the test channel. The digital information is loaded into the local memory under control of a local microcontroller. The local memory is large enough to store a substantial quantity of digital information without replenishment so that the test channel is capable of conducting relatively extensive testing with respect to the pin of the unit under test to which it is coupled. The local memory can store compacted data and the UPE can include a decompaction circuit. Each UPE test channel can accomplish at its associated pin, without switching: functional digital stimulus generation; functional digital measurement; functional digital stimulus generation and measurement; parametric digital stimulus generation; parametric digital measurement; analog stimulus generation; and analog measurement.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- LOCKHEED CORPORATION;GIORDANO ASSOCIATES, INC.;INVESTMENT PARTNERS OF AMERICA, L.P.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Jackson, Philip | Mahwah, NJ | 46 | 554 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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