Process for patterning local interconnects
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United States of America Patent
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-
Apr 14, 1987
Issued Date -
N/A
app pub date -
Mar 7, 1986
filing date -
May 1, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A local interconnect system for VLSI integrated circuits. After titanium is deposited for self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a hardmask is deposited and patterned over the titanium. When a conductive titanium nitride layer is formed overall, it will already be patterned according to this hardmask.
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