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Abstract

The digital frequency divider (or synthesizer) produces non-integral submultiples of an input frequency by alternately dividing its input by two integers by means of two integral digital frequency dividers, one of which produces an output higher than the desired non-integral submultiple and the other of which produces an output lower than the desired non-integral submultiple. The desired non-integral submultiple is obtained by alternately switching the circuit output to two integral digital dividers, the duty cycle of the switch determines the precise output frequency obtained. The concept can be implemented with programmable digital counters and logic circuitry. The circuitry can be used to implement a novel method of duplicating an accurate signal with improved stability. A circuit useful in practicing the method measures the ratio of two frequencies. The frequency divider can be used in a multiplexer set to provide an improved digital clock generator and asynchronous buffer which provides improved user clock signals.

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First Claim