Cryptographic system

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United States of America Patent

PATENT NO 4663500
SERIAL NO

06878518

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Abstract

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A cryptographic system comprises a modulo-2 adder having a first input receptive of a sequence of binary digits to be scrambled and a second input receptive of a sequence of scrambling binary digits for generating a sequence of scrambled binary digits. A function generator having a memory is provided for storing a predeterminable sequence of binary digits in addressible storage locations and reading the stored binary digits in response to an address code represented by combined first and second patterns of binary digits which are generated respectively by a random pattern generator and a shift register which is connected to the output of the modulo-2 adder. The output of the function generator is the scrambling binary digits applied to the modulo-2 adder.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION7-1 SHIBA 5-CHOME MINATO-KU TOKYO 1088001 ?1088001

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakamura, Katsuhiro Tokyo, JP 19 506
Okamoto, Eiji Tokyo, JP 141 1472

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