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Abstract

A CCD imager wherein a mixed MOSFET and JFET periphery is provided using the same device doping profiles as are used for fabrication of the CCD structure. This provides simple fabrication of low-noise amplifiers integrated with the CCD array. Preferably the gate of the JFET is formed with the same implant which forms the virtual phase electrode in an array of virtual phase CCD cells. Preferably the JFETs are used as loads in source-follower stages. Preferably the MOSFET devices include both buried-channel and surface-channel devices connected to a common drain voltage; the buried-channel devices are used for earlier stages of amplification, where they can be operated in their low-noise regime, and the surface channel used for output stages. If buried channel devices were used for the output stage, then the buried-channel devices in the prior stage would have to be biased into a high-noise regime to achieve the necessary output voltage swings.

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First Claim