Multiprocessor system having a shared memory for enhanced interprocessor communication
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United States of America Patent
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-
Jun 16, 1987
Grant Date -
N/A
app pub date -
Oct 24, 1984
filing date -
Oct 24, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A multiprocessor system consisting of a plurality of slave processors and a master processor each connected by a bus to a common memory. Message transfers are implemented by the master which scans one-byte areas in the common memory-each slave processor only being able to load a pointer to one said one-byte areas. Contention problems are prevented because once a remote processor has loaded information to its one byte area it must pass control of the bus to another processor. The system is fast because the master does not waste time looking at empty memory.
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