Data processing apparatus having binary multiplication capability
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United States of America Patent
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-
Aug 4, 1987
Grant Date -
N/A
app pub date -
Jan 17, 1985
filing date -
Jan 24, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
There is described a data processing apparatus with a binary multiplication capability. The apparatus has an arithmetic and logic unit (ALU) and a operand register. The operand register is divided into two portions, the first of which can be shifted while the second is loaded in parallel. For multiplication, the first portion is used to hold a multiplier and to receive the least significant bits of the result, while the second portion receives the most significant bits of the result. The invention avoids the need for a separate shift register to hold the multiplier. The described apparatus also has a look-ahead facility, for selecting the next bit of the multiplier ahead of its requirement, so that it is immediately available when required.
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