Importance

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Abstract

A tester for logic circuits provided with a fast recovery power supply for supplying high current to a logic circuit under test and for measuring a low current of the circuit under test. The power supply of the tester has first and second amplifiers coupled to the CMOS circuit being tested and having dual feedback loops with one loop controlling the resistance of the other loop. The first amplifier is coupled between a reference voltage and a capacitor supplying current to the CMOS circuit under test. The second amplifier is coupled between the same reference voltage, and the output of the first amplifier. A resistive feedback is coupled between the circuit under test and the output of the first amplifier and an AC coupled impedance switching means is coupled between the output of the second amplifier and across the resistive feedback whereby the impedance switch can alter the impedance of the resistive feedback by shunting the resistor to recharge the capacitor supplying current to the circuit under test.

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First Claim