Data processing system including encoder, decoder and write precompensator, using run length limited code
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United States of America Patent
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-
Sep 1, 1987
Grant Date -
N/A
app pub date -
Jun 24, 1985
filing date -
Jun 24, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A data processing system employs a run-length limited code and incorporates an encoder and decoder sharing common circuits, including a data shift register, a code shift register and a write precompensation logic circuit. Data bits are processed as single words or double words depending upon the pattern of data bits as they are shifted.
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