Multiple byte serial data transfer protocol

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United States of America Patent

PATENT NO 4692859
SERIAL NO

06495115

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Abstract

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In a data processor system, a method for transferring data to and from a random access memory (RAM) with a serial data interface and having accessible word location includes the steps of generating a timing pulse consisting of contiguous time slots each defined by the Nth count of a counter, generating an initial address signal in the first occurring contiguous time slot of the timing pulse with the initial address signal including a read/write command signal, incrementing the initial address signal at each Nth count of the counter to form data address signal, accessing memory locations in the RAM with the initial address signal followed by said data address signals, supplying data words to or reading data words from the RAM at the word locations accessed by the data address signals in response to each Nth count of the counter and when the data address signal contains a write command or a read command signal, respectively.

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Patent Owner(s)

Patent OwnerAddress
HARRIS SEMICONDUCTOR PATENTS INC A CORP OF DE1025 WEST NASA BOULEVARD MELBOURNE FL 32919

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ott, Russell G Cranford, NJ 7 144

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