Security for integrated circuit microcomputer with EEPROM
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United States of America Patent
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-
Oct 6, 1987
Grant Date -
N/A
app pub date -
Dec 27, 1984
filing date -
Dec 27, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An integrated circuit microcomputer with EEPROM has a limited number of modes for operation. In at least first and second modes, the inner workings of the microcomputer, including the contents of the EEPROM, can be read externally from the microcomputer. An EEPROM security bit, when set, prevents the first mode from being entered and causes the EEPROM to be erased when the second mode is entered. The EEPROM is also erased if the security bit is erased.
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