Method of making multilayer capacitor memory device

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United States of America Patent

PATENT NO 4700457
SERIAL NO

06823100

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Abstract

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A semiconductor device comprising a capacitor of a laminated structure and a method of manufacturing thereof, in which first conductive layer and second conductive layer of different materials or different compositions are stacked alternately with dielectric films interposed therebetween and the first conductive layers and the second conductive layers are interconnected respectively at a time by suitably combining a selective etching method and an anisotropic etching method.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Matsukawa, Takayuki Itami, JP 27 556

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