Semiconductor integrated circuit device and method of producing the same
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United States of America Patent
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Oct 20, 1987
Grant Date -
N/A
app pub date -
Dec 9, 1985
filing date -
Dec 10, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A silicide layer of a refractory metal for reducing resistance and a nitride layer for preventing diffusion of aluminum are formed on the source and drain regions of an MISFET. The silicide layer is formed in self-alignment with the source and drain regions by two annealings effected at a low temperature and at a high temperature, respectively, and has a low resistance. The nitride layer is formed by directly nitriding the silicide layer.
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