High speed frequency divide-by-5 circuit
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United States of America Patent
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-
Oct 27, 1987
Grant Date -
N/A
app pub date -
May 23, 1986
filing date -
May 23, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An improved, high-speed frequency divider circuit (32) is presented. The frequency divider circuit (32) is comprised of three D-type flip-flops (34, 36 38). The three flip-flops (34, 36, 38) are clocked synchronously for higher speed of operation. The design of the frequency divider circuit (32) embodies a sagacious state assignment to minimize the number of bits that change state on any given state transition, thus reducing the possibility of faulty circuit operation.
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