Coarse flaw detector for printed circuit board inspection
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United States of America Patent
Stats
-
Nov 17, 1987
Grant Date -
N/A
app pub date -
Jun 17, 1985
filing date -
Jun 17, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A system for detecting flaws in printed circuit boards. The circuit board is scanned by a video camera to provide a serial stream of bits each indicative of a picture element within a particular scan line. The serial stream of bits is formulated into binary numbers each representative of a contiguous path of picture elements composed of n.times.n picture elements. Each of these binary numbers are compared with a corresponding one of a set binary numbers stored in memory representative of a perfect master printed circuit board. Failure of the printed circuit board to match the stored master indicates a flaw. The invention also includes means to generate overlapping patches to insure detection of defects which occur in adjacent patches.
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Cited Art Landscape
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