Cache memory consistency control with explicit software instructions
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United States of America Patent
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-
Dec 15, 1987
Grant Date -
N/A
app pub date -
Jun 28, 1985
filing date -
Jun 28, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Memory integrity is maintained in a system with a hierarchical memory using a set of explicit cache control instructions. The caches in the system have two status flags, a valid bit and a dirty bit, with each block of information stored. The operating system executes selected cache control instructions to ensure memory integrity whenever there is a possibility that integrity could be compromised.
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