Digital phase-locked loop and frequency measuring device

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United States of America Patent

PATENT NO 4715000
SERIAL NO

06762992

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Method and apparatus are disclosed for providing a sampling signal having a frequency which is maintained in constant proportion to the frequency of an input signal. The input signal is sampled at instants determined by the sampling signal to provide a plurality of data signals associated with one cycle of the input signal. A signal processor is adapted to receive first and second pluralities of data signals associated with first and second cycles of the input signal and to perform two discrete Fourier analyses to provide two phasor signals representing two voltage phasors of respective fundamental frequencies of the discrete Fourier transforms. The phasor signals are used to generate a difference signal indicative of the angle between the two voltage phasors and, therefore, proportional to the difference between the sampling frequency and the input frequency. The difference signal is used to modulate the period of the sampling signal such that the frequency of the sampling signal is maintained in constant proportion to that of the input signal.

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Patent Owner(s)

Patent OwnerAddress
GENERAL ELECTRIC COMPANY A CORP OF NEW YORKWAUKESHA WI 53186

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Premerlani, William J Scotia, NY 24 1380

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