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Abstract

A display processor using first and second chrominance map memories for storing values of first and second color-difference signals, each normalized respective to luminance signal. An image memory supplies, at pixel scan rate, data used to provide read-addresses to said first and second chrominance map memories and data used to describe the luminance signal. The first and second chrominance map memory read-outs are each multiplied by the luminance signal of appropriate spatial bandwidth to generate descriptions of the first and second color-difference signals i non-normalized form. These first and second color-difference signals and a full-spatial-bandwidth luminance signal are supplied to color matrixing circuitry. The color matrixing circuitry responds to these signals to provide red, green and blue drive signals to display apparatus. The display apparatus may comprise video amplifiers for the drive signals and a color kinescope, by way of example.

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First Claim