High density integrated circuit package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4727410
SERIAL NO

06555032

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A multifaceted package is disclosed that permits VLSI and VHSIC integrated circuits in the form of integrated circuit die or chip carries to be mounted on the faces of the package to form a high-density circuit package. The package comprises a plurality of ceramic layers which are cofired and fused together to form a monolithic body having a plurality of planar faces. The body may have a cubic, pyramidal, pentagonal, or other solid geometric form and may have integrated circuit elements disposed on one or more faces of the body. Integrated circuit die or dies discrete electrical components such as chip carriers, resistors, etc. may be mounted to faces of the body and a lid may be provided for hermetic encapsulation of integrated circuit die between lids and respective faces of the body. In another embodiment, integrated circuit die or dies are disposed in a carrier comprising a plurality of ceramic layers which are cofired and fused to form a monolithic body and having conductive paths and vias on and through selected ones of the layers for electrical interconnection of the die or dies with contact sites provided on respective faces of the body. Selected faces of the body may be provided with contact sites oriented to mate with contacts of standard leaded or leadless chip carriers. The body may additionally be provided with means to facilitate removal of heat generated during operation by integrated circuit devices disposed on respective body faces or devices disposed in carriers attached to respective body faces.

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Patent Owner(s)

Patent OwnerAddress
POLESE COMPANY INC10103 CARROLL CANYON ROAD SAN DIEGO CA 92131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Higgins, III Leo M South Easton, MA 29 2523

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