Importance

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Abstract

Disclosed is a digital zero-IF selectivity section circuit which operates on a recovered input signal, digitally clocked by a first clock at a rate of FS, in receiver device. The circuit uses a second clock operating at a lesser rate than the first clock to clock an N-order FIR digital filtering means to selectively band-limit the frequency spectrum of the recovered input signal. A second digital filtering means is coupled to the output of the first FIR digital filtering means. The second digital filtering means operates at a clock speed less than or equal to the second clock speed. The second digital filtering means is used to further selectively band-limit the frequency spectrum of the recovered input signal.

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First Claim