EEPROM with metal doped insulator

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4733482
SERIAL NO

07035524

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Insulating layers responsible for the trapping of electric charge in non-volatile semiconductor memories, such as FAMOS or MNOS, are fabricated as thicker layers when doped with metals having partially filled d or f electron shells. Typically the insulating layer is silicon oxide doped with up to 10 atomic % of a first transition series metal.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
HUGHES MICROELECTRONICS LIMITEDGLENROTHES FIFE KY7 5PY

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Delima, Jaoquim J Thornton Heath, GB3 1 9
Krishna, Komanduri V Edinburgh, GB3 1 9
Owen, Alan E Edinburgh, GB3 4 524
West, James L Kircaldy, GB3 4 83

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation