Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage

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United States of America Patent

PATENT NO 4739191
SERIAL NO

06258156

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Abstract

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An on-chip regulated substrate bias voltage generator for an MOS integrated circuit includes a ring oscillator (10) for developing a true signal and its complement. The signals are applied to a charge pump (12) that includes two capacitors (C1 and C2) and a plurality of rectifiers (22, 24, and 26). The charge pump produces a substrate bias voltage (V.sub.BB) which is supplied to the gate of a depletion-mode field-effect transistor (28) whose source receives a reference voltage (V.sub.SS). The transistor forms part of a control circuit (14) coupled to the ring oscillator. In the N-channel case, the charge pumping action on the substrate drives the substrate bias negative until it reaches the sum of the reference voltage and threshold voltage of the depletion-mode transistor. This enables the control circuit to control the operation of the ring oscillator so as to regulate the substrate bias voltage.

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Patent Owner(s)

Patent OwnerAddress
SIGNETICS CORPORATION 811 EAST ARQUES AVENUE SUNNYVALE CA 94086 A CORP OFCA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Puar, Deepraj S Sunnyvale, CA 17 699

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