Dynamically controlled interleaving
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United States of America Patent
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-
Apr 26, 1988
Issued Date -
N/A
app pub date -
Apr 9, 1986
filing date -
Oct 12, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing system in which interleaving among memory controllers may be controlled. The interleaving is carried out on a double-word basis, and the state of the double-word address bit is used to select the bus address of the memory controller in which double-words having that address bit are stored. The dynamically controllable interleaving allows greater flexibility in the design of the memory controllers in a data processing system.
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