Column shorted and full array shorted functional plane for use in a modular array processor and method for using same
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United States of America Patent
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May 17, 1988
Grant Date -
N/A
app pub date -
Jun 25, 1982
filing date -
Jun 25, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A column shorted and full array shorted functional plane for simultaneously transferring, or shorting, data to and from the data exchange subsystems of the array processor. This functional plane nominally includes an array of pseudo-modules that architecturally corresponds to the module arrays of the other functional planes of the array processor. Thus, a pseudo-module is present in each of the elemental processors. These pseudo-modules are associated as columns that are each interconnected by a shorted plane column data exchange subsystem. These columns are, in turn, associated with column control logic circuits that each include a column memory register. A mode decode logic circuit establishes the operating configuration of the column control logic circuits.
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