Method of controlling a logical simulation at a high speed
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United States of America Patent
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May 24, 1988
Grant Date -
N/A
app pub date -
Mar 28, 1986
filing date -
Mar 30, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a method of controlling a logical simulation of a logic circuit comprising a plurality of logic elements which can be simulated by forming a shift register string, the logical simulation is carried out without serial shift operation of the shift register string on setting shift-in signals into the shift register string and/or on extracting internal states from the shift register string. Setting of the shift-in signals and extraction of the internal states are possible by monitoring a simulation table which has a plurality of addresses for the logic elements.
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