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United States of America Patent

PATENT NO 4748320
SERIAL NO

06923216

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In an IC (integrated circuit) card, a CPU (central processing unit) is connected to a data bus and an address bus. A data memory is connected to the data bus and the address bus. The data memory is a rewritable memory, such as EEPROM (electrically erasable programmable read only memory) or battery backed-up RAM (random access memory). The data memory is segmented into a predetermined number of sectors each consisting of predetermined bytes. An external processing device, such as a terminal device is connected to the data bus and the address bus, via a one-bit I/O line and a port. The terminal device supplies a processing instruction via the I/O line to the third port. The CPU receives the processing instruction via the data bus, analyzes the instruction, and reads out and executes the necessary program. The CPU supplies the results of each processing to the terminal device, by way of the data bus, the port and the I/O bus.

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First Claim

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Patent Owner(s)

  • TOPPAN PRINTING CO., LTD.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Takahashi, Masashi Tokyo, JP 265 2361
Yorimoto, Yoshikazu Matsudo, JP 5 332

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