Process of forming a compliant lead frame for array-type semiconductor packages

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United States of America Patent

PATENT NO 4751199
SERIAL NO

07005675

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A lead frame that is suited for use on array types of integrated circuit packages to provide a high degree of compliance for absorbing mechanical stress induced by thermal changes includes a series of individual terminal elements that are connected in a strip form by means of break tabs disposed between adjacent elements. Each terminal element provides two spaced, generally parallel mounting surfaces that are resiliently connected to one another by means of an integral intermediate section. While the terminal elements are interconnected in strip form, one of the mounting surfaces of each element can be bonded to an associated attachment region on the semiconductor substrate. After all of the terminals of the strip have been so bonded, the break tabs between adjacent terminals can be removed to thereby separate the terminals from one another. The package which then results contains discrete compliant terminals which are suitable for subsequent surface attachment to the printed circuit board.

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Patent Owner(s)

  • NATIONAL SEMICONDUCTOR CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Phy, William S Los Altos Hills, CA 13 513

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