Semiconductor integrated circuit device having a multi-layered wiring board for ultra high speed connection
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United States of America Patent
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-
Jun 14, 1988
Issued Date -
N/A
app pub date -
Oct 20, 1986
filing date -
Dec 23, 1983
priority date (Note) -
Expired
status (Latency Note)
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Abstract
This invention relates to an ultra high speed semiconductor integrated circuit device, and in particular to a layout and connecting structure between lead terminals of a package and signal pads on a chip. The device includes a wiring board, positioned above the chip, which comprises an internal transmission line having a predetermined characteristic impedance on a dielectric insulating plate. The internal transmission line forms a strip line or coplanar transmission line including a signal line an ground conductor film. The wiring board internconnects the outer lead and bonding pads on the chip. The wiring between the internal transmission lines can cross by using a multi-layered structure. As the result of the structure of the present invention, transmission loss is reduced, and it is possible to design the wiring board having an optimum performance for ultra high speed operation of the high density integrated circuit device.
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