Digital computer for implementing event driven simulation algorithm
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United States of America Patent
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Jun 14, 1988
Grant Date -
N/A
app pub date -
Mar 28, 1984
filing date -
Mar 28, 1984
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer for implementing an event driven algorithm which is used in conjunction with a master computer is disclosed. The computer includes a plurality of processors coupled in a ring arrangement each of which is microprogrammable. Each processor includes a memory and a memory address generator. The generator can generate addresses based on a combination of signals from both the microcode and signals on the data bus.
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